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512-bit computing

From Wikipedia, the free encyclopedia

In computer architecture, 512-bit integers, memory addresses, or other data units are those that are 512 bits (64 octets) wide. Also, 512-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers, address buses, or data buses of that size. There are currently no mainstream general-purpose processors built to operate on 512-bit integers or addresses, though a number of processors do operate on 512-bit data.

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Transcription

Representation

A 512-bit register can store 2512 different values. The range of integer values that can be stored in 512 bits depends on the integer representation used.

The maximum value of an unsigned 512-bit integer is 2512 − 1, written in decimal as 13,​407,​807,​929,​942,​597,​099,​574,​024,​998,​205,​846,​127,​479,​365,​820,​592,​393,​377,​723,​561,​443,​721,​764,​030,​073,​546,​976,​801,​874,​298,​166,​903,​427,​690,​031,​858,​186,​486,​050,​853,​753,​882,​811,​946,​569,​946,​433,​649,​006,​084,​095 or approximately 1.34078 x 10154, or textualized as over 13.407 Quinquagintillion.

Hardware

The AMD Radeon R9 290X (Sapphire OEM version pictured here) uses a 512 bit memory bus

The Intel Xeon Phi has a vector processing unit with 512-bit vector registers, each one holding sixteen 32-bit elements or eight 64-bit elements, and one instruction can operate on all these values in parallel. However, the Xeon Phi's vector processing unit does not operate on individual numbers that are 512 bits long.[1]

Some GPUs such as the Advanced Micro Devices (AMD) Radeon HD 2900XT, the Nvidia GTX 280,[2] GTX 285,[3] Quadro FX 5800[4] and several Nvidia Tesla products move data across a 512-bit memory bus. Then AMD Radeon R9 290, R9 290X and 295X2 followed.

AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture proposed by Intel in July 2013, and released on 2016 with Knights Landing, and in 2017 on the HEDT and consumer server platform, with Skylake-X and Skylake-SP respectively.

Software

Many hash functions, such as SHA-512 and SHA3-512, have a 512-bit output.

References

  1. ^ "Intel Xeon Phi Coprocessor System Software Developers Guide" (PDF). Intel. March 2014. Retrieved April 30, 2019.
  2. ^ "GTX 280: Specifications". GeForce. Retrieved 2013-08-13.
  3. ^ "GTX 285: Specifications". GeForce. Retrieved 2013-08-13.
  4. ^ "Nvidia Quadro FX 5800 provides professionals with visual supercomputing from their desktops delivering results that push visualization beyond traditional 3D". Nvidia.com. Retrieved 2013-08-13.
This page was last edited on 14 January 2024, at 11:00
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