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MOS Technology 6508

From Wikipedia, the free encyclopedia

The MOS Technology 6508 is an 8-bit microprocessor designed by MOS Technology. Based on the popular 6502, the 6508 is augmented with two additional features: an internal 8-bit digital I/O port and 256 bytes of internal static RAM.

Ceramic variant of MOS6508 CPU

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Transcription

Memory layout

The internal RAM is mapped into the CPU address space both at $0000-$00FF and at $0100-$01FF, so it can serve as both zero page and stack space. The I/O port is available at location $0001, with a data-direction register at $0000, which is the same layout of the 6510.

Variants

MOS Technology 6508 pin-out

There may be different strapping/bonding variants of this chip; the datasheet below lists pin 40 as clock phase two, but in the CBM900 computer, the 6508 controlling floppydisk has pin 40 as "Set Overflow" (SO). SO is a pin that is also offered on the 40-pin 6502, but omitted on all the 28-pin 650x variants (6503–6507). The SO pin, on 6500 family CPUs that have it, sets the Overflow flag in the P register, which can be tested using BVC/BVS instructions. Using SO, a tight polling loop of 3 machine cycles can be constructed, tighter than the minimum two instructions of any test and branch loop not using the SO pin functionality.

References

Further reading

External links

This page was last edited on 28 April 2023, at 02:15
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