MIS capacitor

A MIS capacitor is a capacitor formed from a layer of metal, a layer of insulating material and a layer of semiconductor material. It gets its name from the initials of the metal-insulator-semiconductor (MIS) structure. As with the MOS field-effect transistor structure, for historical reasons, this layer is also often referred to as a MOS capacitor, but this specifically refers to an oxide insulator material.

The maximum capacitance, C_MIS(max) is calculated analogously to the plate capacitor:

${\displaystyle C_{\mathrm {MIS(max)} }=\varepsilon _{0}\varepsilon _{r}\cdot {{A} \over {d}}}$

where :

• ε_r is the insulator's relative permittivity
• ε₀ is the permittivity of the vacuum
• A is the area
• d is the insulator thickness

The production method depends on materials used (it is even possible that polymers can be used as both the insulator or the semiconductor layers^[1]). We will consider an example of an inorganic MOS capacitor based on silicon and silicon dioxide. On the semiconductor substrate, a thin layer of oxide (silicon dioxide) is applied (by, for example, thermal oxidation, or chemical vapour deposition) and then coated with a metal.

This structure and thus a capacitor of this type is present in every MIS field-effect transistor, such as MOSFETs. For the steady reduction of the size of structures in microelectronics, the ever thinner insulation layers are required (to keep the same capacitance for smaller area). However, when the oxide thickness falls below ~ 5 nm there arise parasitic leakages due to the tunneling effect. From this reason, the use of so-called high-κ dielectrics as the insulator material is being investigated.

In the MOSFET R&D, the MIS capacitors are extensively used as a relatively simple testing bench, e.g. to examine fabrication process and properties of the novel insulator materials, to measure leakage currents and charge-to-breakdown, to get the trap density value, to verify different models for carrier transport. Furthermore, the capacitors are often included in tutorial courses, particularly to discuss their charge states (inversion, depletion, accumulation) which also occur in the more complex transistor systems.

References

This page was last edited on 11 September 2023, at 20:30