Lookahead carry unit

A lookahead carry unit (LCU) is a logical unit in digital circuit design used to decrease calculation time in adder units and used in conjunction with carry look-ahead adders (CLAs).

4-bit adder

A single 4-bit CLA is shown below:

16-bit adder

By combining four 4-bit CLAs, a 16-bit adder can be created but additional logic is needed in the form of an LCU.

The LCU accepts the group propagate (${\displaystyle P_{G}}$) and group generate (${\displaystyle G_{G}}$) from each of the four CLAs. ${\displaystyle P_{G}}$ and ${\displaystyle G_{G}}$ have the following expressions for each CLA adder:^[1]

${\displaystyle P_{G}=P_{0}\cdot P_{1}\cdot P_{2}\cdot P_{3}}$

${\displaystyle G_{G}=G_{3}+G_{2}\cdot P_{3}+G_{1}\cdot P_{2}\cdot P_{3}+G_{0}\cdot P_{1}\cdot P_{2}\cdot P_{3}}$

The LCU then generates the carry input for each CLA.

Assume that ${\displaystyle P_{i}}$ is ${\displaystyle P_{G}}$ and ${\displaystyle G_{i}}$ is ${\displaystyle G_{G}}$ from the i^th CLA then the output carry bits are

${\displaystyle C_{4}=G_{0}+P_{0}\cdot C_{0}}$

${\displaystyle C_{8}=G_{4}+P_{4}\cdot C_{4}}$

${\displaystyle C_{12}=G_{8}+P_{8}\cdot C_{8}}$

${\displaystyle C_{16}=G_{12}+P_{12}\cdot C_{12}}$

Substituting ${\displaystyle C_{4}}$ into ${\displaystyle C_{8}}$, then ${\displaystyle C_{8}}$ into ${\displaystyle C_{12}}$, then ${\displaystyle C_{12}}$ into ${\displaystyle C_{16}}$ yields the expanded equations:

${\displaystyle C_{4}=G_{0}+P_{0}\cdot C_{0}}$

${\displaystyle C_{8}=G_{4}+G_{0}\cdot P_{4}+C_{0}\cdot P_{0}\cdot P_{4}}$

${\displaystyle C_{12}=G_{8}+G_{4}\cdot P_{8}+G_{0}\cdot P_{4}\cdot P_{8}+C_{0}\cdot P_{0}\cdot P_{4}\cdot P_{8}}$

${\displaystyle C_{16}=G_{12}+G_{8}\cdot P_{12}+G_{4}\cdot P_{8}\cdot P_{12}+G_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}+C_{0}\cdot P_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}}$

${\displaystyle C_{4}}$ corresponds to the carry input into the second CLA; ${\displaystyle C_{8}}$ to the third CLA; ${\displaystyle C_{12}}$ to the fourth CLA; and ${\displaystyle C_{16}}$ to overflow carry bit.

In addition, the LCU can calculate its own propagate and generate:

${\displaystyle P_{LCU}=P_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}}$

${\displaystyle G_{LCU}=G_{12}+G_{8}\cdot P_{12}+G_{4}\cdot P_{8}\cdot P_{12}+G_{0}\cdot P_{4}\cdot P_{8}\cdot P_{12}}$

${\displaystyle C_{16}=G_{LCU}+C_{0}\cdot P_{LCU}}$

64-bit adder

By combining 4 CLAs and an LCU together creates a 16-bit adder. Four of these units can be combined to form a 64-bit adder. An additional (second-level) LCU is needed that accepts the propagate (${\displaystyle P_{LCU}}$) and generate (${\displaystyle G_{LCU}}$) from each LCU and the four carry outputs generated by the second-level LCU are fed into the first-level LCUs.

References

• Katz, Randy (1994). Contemporary Logic Design. The Benjamin/Cummings Publishing Company. pp. 249–256. ISBN 0-8053-2703-7.
• Vahid, Frank (2006). Digital Design. John Wiley and Sons Publishers. pp. 296–316. ISBN 0-470-04437-3.

This page was last edited on 13 June 2023, at 17:07