Josep Torrellas | |
|---|---|
| Born | 1963 |
| Citizenship | Spain |
| Alma mater | Stanford University |
| Awards | |
| Scientific career | |
| Fields | Electrical Engineering |
| Institutions | University of Illinois |
| Thesis | Multiprocessor cache memory performance: Characterization and optimization (1992) |
| Doctoral advisor | John L. Hennessy |
| Doctoral students | |
Josep Torrellas (born 1963, Montblanc, Spain) is Professor and Willett Faculty Scholar in the Department of Computer Science and a research faculty for the Universal Parallel Computing Research Center at the University of Illinois Urbana–Champaign. Torrellas's research area is computer architecture, focusing on speculative multithreading, multiprocessor organization, integration of processors and memory, and architectural support for software debuggability and machine reliability. He has been involved in the Stanford DASH and the Illinois Cedar multiprocessor projects, and led the Illinois Aggressive COMA and FlexRAM Intelligent Memory projects.
Torrellas has contributed to many NSF, DARPA and DOE funding initiatives. The Aggressive COMA research project was selected as one of the "Eight Point-Design Studies" that DARPA, NSF, NSA and NASA supported in the mid-nineties in a nationwide effort to accelerate the arrival of a petascale machine. He has received as lead PI several multimillion-dollar NSF grants, and is the lead PI of two medium ITR grants. He has directed projects in several DARPA initiatives, including the recent "Polymorphous Computer Architectures" (PCA), and "High Productivity Computing Systems" (HPCS). In the HPCS program, he is playing a leading role in helping define the architecture of IBM's PERCS multiprocessor (POWER7). He is also involved in DOE's Extreme Scale Computation initiative.
Torrellas has been at the University of Illinois since receiving his PhD in Electrical Engineering from Stanford University in 1992. He also spent a sabbatical year as Research Staff Member at IBM's T.J. Watson Research Center. Torrellas is an IEEE and ACM[1] Fellow and member of the National Computational Science Alliance (NCSA) and the DOE Illinois Center for the Simulation of Advanced Rockets (CSAR). He is currently the Chairman of IEEE Technical Committee on Computer Architecture (TCCA), an Associate Editor of the ACM Transactions on Architecture and Code Optimization (TACO), and a Member of the Advisory Board of the ECE Department, University of Rochester. He previously served as Vice-Chairman and Member of the Advisory Board of IEEE TCCA from 1998 to 2005. Torrellas has received an NSF Young Investigator Award, an NSF RIA, and an IBM Partnership Award. He was the recipient of the 2021 Harry H. Goode Memorial Award.[2]
YouTube Encyclopedic
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Variation-Tolerant Computer Architectures
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Interview with Dr. Gurindar Sohi
Transcription
Links
- Universal Parallel Computing Research Center (UPCRC) at Illinois
- i-acoma Architecture Group at the University of Illinois
- Illinois OpenSPARC Center
- Josep Torrellas's Homepage
- Parallel Computing Research at Illinois: The UPCRC Agenda
- Illinois Department of Computer Science
References
- ^ "ACM Names 41 Fellows from World's Leading Institutions — Association for Computing Machinery". Archived from the original on 2012-04-28. Retrieved 2012-05-21.
- ^ "Josep Torrellas Earns 2021 IEEE Computer Society Harry H. Goode Memorial Award". IEEE Computer Society. March 5, 2021.
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This page was last edited on 2 May 2024, at 00:16