Input A B |
Output A → B | |
0 | 0 | 1 |
0 | 1 | 1 |
1 | 0 | 0 |
1 | 1 | 1 |
The IMPLY gate is a digital logic gate that implements a logical conditional.
Symbols
There are two symbols for IMPLY gates: the traditional symbol and the IEEE symbol. For more information see Logic Gate Symbols.
Traditional IMPLY Symbol | IEEE IMPLY Symbol |
The logic symbol → can be used to denote IMPLY in algebraic expressions.
See also
Wikimedia Commons has media related to IMPLY_gates. |
- NIMPLY gate
- AND gate
- NOT gate
- NAND gate
- NOR gate
- XOR gate
- XNOR gate
- Boolean algebra (logic)
- Logic gates
This page was last edited on 5 April 2021, at 00:59