Advanced packaging[1] is the aggregation and interconnection of components before traditional integrated circuit packaging where a single die is packaged. Advanced packaging allows multiple devices (electrical, mechanical, or semiconductor) to be merged and packaged as a single electronic device. Unlike traditional integrated circuit packaging, advanced packaging employs processes and techniques that are typically performed at semiconductor fabrication facilities. Advanced packaging thus sits between fabrication and traditional packaging -- or, in other terminology, between BEoL and post-fab. Advanced packaging includes multi-chip modules, 3D ICs,[2] 2.5D ICs,[2] heterogeneous integration,[3] fan-out wafer-level packaging,[2] system-in-package, quilt packaging, combining logic (processors) and memory in a single package, die stacking, several chiplets or dies in a package,[2] combinations of these techniques, and others. 2.5D and 3D ICs are also called 2.5D or 3D packages.[3]
Advanced packaging can help achieve performance gains through the integration of several devices in one package and associated efficiency gains (by reducing the distances signals have to travel, in other words reducing signal paths), and allowing for high numbers of connections between devices, without having to resort to smaller transistors which have become increasingly more difficult to manufacture.[4] Fan-out packaging is seen as a low cost option for advanced packaging.[5]
Advanced Packaging is considered fundamental in expanding the Moore’s Law.[6][2] An example of heterogeneus integration is Intel's EMIB, which uses "bridges" made on silicon substrates, to connect different dies together.[7]
References
- ^ "Advanced Packaging". Semiconductor Engineering. Retrieved 17 December 2021.
- ^ a b c d e LaPedus, Mark (January 15, 2019). "More 2.5D/3D, Fan-Out Packages Ahead". Semiconductor Engineering.
- ^ a b LaPedus, Mark (May 20, 2021). "Advanced Packaging's Next Wave". Semiconductor Engineering.
- ^ "Advanced Packaging's Next Wave". 20 May 2021.
- ^ Sperling, Ed (March 5, 2018). "Toward High-End Fan-Outs". Semiconductor Engineering.
- ^ Shivakumar, Sujai; Borges, Chris (June 26, 2023). "Advanced Packaging and the Future of Moore's Law" – via www.csis.org.
{{cite journal}}: Cite journal requires|journal=(help) - ^ Lau, John H. (April 3, 2019). "Heterogeneous Integrations". Springer – via Google Books.
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