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3B series computers

From Wikipedia, the free encyclopedia

A 3B15 computer, circa 1997
A 3B15 computer, circa 1997

The 3B series computers are a line of minicomputers that were produced by AT&T Computer Systems' Western Electric subsidiary for use with the company's UNIX operating system and its in-house micro-programmed central processing units. The line primarily consists of the models 3B20, 3B5, 3B15, 3B2, and 3B4000. The series is notable for controlling a series of electronic switching systems (ESS) for telecommunication, for general computing purposes, and for serving as the historical software porting base for commercial UNIX.

3B high-availability processors

The original series of 3B computers include the models 3B20C, 3B20D, 3B21D, and 3B21E.

The 3B (3B20D/3B20C/3B21D/3B21E) is a 32-bit microprogrammed duplex (redundant) high availability processor unit with a real-time operating system. It is used in the telecommunications environment and was first produced in the late 1970s at the WECo factory in Lisle, Illinois. It uses the Duplex Multi Environment Real Time (DMERT) operating system which was renamed UNIX-RTR (Real Time Reliable) in 1982. The Data Manipulation Unit (DMU) provided arithmetic and logic operations on 32-bit words using AMD 2901 bipolar 4-bit processor elements.[1] The first 3B20D was called the Model 1. Each processor's control unit consisted of two frames of circuit packs. The whole duplex system required many seven foot frames of circuit packs plus at least one tape drive frame (most telephone companies wrote billing data on magnetic tapes), and many washing machine sized disk drives. For training and lab purposes a 3B20D could be divided into two "half-duplex" systems. A 3B20S consisted of most of the same hardware as a half-duplex but used a completely different operating system.

The 3B20C was briefly available as a high-availability fault tolerant multiprocessing general purpose computer in the commercial market in 1984. The 3B20E was created to provide a cost reduced 3B20D for small offices that did not expect such high availability. It consisted of a virtual "emulated" 3B20D environment running on a stand-alone general purpose computer (the system was ported to many computers but primarily runs on the Sun Microsystems Solaris environment).

There have been many improvements to the 3B20D UNIX-RTR system in both software and hardware throughout the 1980s, 1990s, and 2000s. These included some remarkable features such as disk independent operation (DIOP: the ability to continue essential software processing such as telecommunications after duplex failure of redundant essential disks); off-line boot (the ability to split in half and boot the out-of-service half, typically on a new software release); and switch forward (switch processing to the previously out-of-service half). The processor was re-engineered and renamed in 1992 as the 3B21D. It is still in use as of 2016 as a component of many Alcatel-Lucent products such as the 2STP signal transfer point, and the 4ESS and 5ESS switches (both wireline and wireless).

General-purpose computers

A 3B2 model 400
A 3B2 model 400

The general purpose family of 3B computer systems includes the 3B2, 3B5, 3B15, 3B20S, and 3B4000.

These computers were named after the successful 3B20D. The 3B20S (simplex) ran using the UNIX operating system and was developed at Bell Labs and produced by WECo in 1982 for general purpose internal Bell System use, and later for the mini-computer market. The other 3B computers were also created for this market and eventually were running UNIX System V from AT&T.


The 3B20S had virtually the same hardware as the 3B20D. The machine was approximately the size of a large refrigerator, requiring a minimum of 170 square feet floor space.[2] It was in use at the 1984 Summer Olympics, where around twelve 3B20S served the email requirements of the Electronic Messaging System, which was built to replace the man-based messaging system of earlier Olympiads. The system connected around 1800 user terminals and 200 printers.[3]


3B2/300 motherboard
3B2/300 motherboard

The 3B2 was introduced using the WE 32000 32-bit microprocessor with memory management chips that supported demand paging. The 3B2 Model 300 was approximately 4 inches (100 mm) high and the 3B2 Model 400 was approximately 8 inches (200 mm) high. The 300 was soon supplanted by the 3B2/310, which featured the WE 32100 CPU as did all later models. The Model 400 allowed more peripheral slots and more memory, and had a built-in 23 MB QIC tape drive managed by a floppy disk controller (nicknamed the "floppy tape"). These three models used standard MFM5 14" hard disk drives. The 3B2/600 offered an improvement in performance and capacity: it featured a SCSI controller for the 60 MB QIC tape and two internal full-height disk drives. The 600 was approximately twice as tall as a 400, and was oriented with the tape and floppy disk drives opposite the backplane (instead of at a right angle to it as on the 3xx, 4xx and later 500 models). Early models used an internal Emulex card to interface the SCSI controller with ESDI disks, with later models using SCSI drives directly. The 3B2/500 was the next model to appear, essentially a 3B2/600 with enough components removed to fit into a 400 case; one internal disk drive and several backplane slots were sacrificed in this conversion. Unlike the 600, which because of its two large fans was quite loud, the 500 was tolerable in an office environment, like the 400. The 3B2/700 was an uprated version of the 600 featuring a slightly faster processor, and the 3B2/1000 was an additional step in this direction.


The 3B5 was built using the older Western Electric WE 32000 32-bit microprocessor. The initial versions had discrete memory management unit hardware using gate arrays, and supported segment-based memory translation. I/O was programmed using memory-mapped techniques. The machine was approximately the size of a dishwasher, though adding the reel-to-reel tape drive increased its size.

These computers used SMD hard drives.


The 3B15 was the faster follow-on to the 3B5, with similar large form factor.


The 3B4000 was a high availability server based on a 'snugly-coupled' architecture using the WE series 32x00 32-bit processor. Known internally as 'Apache', the 3B4000 was a follow-on to the 3B15 and initially used a 3B15 as a master processor. Developed in the mid-1980's at the Indian Hill West facility by the High Performance Computer Development Lab, the system consisted of multiple high performance (at the time) processor boards – adjunct processing elements (APEs) and adjunct communication elements (ACEs). These adjunct processors ran a customized UNIX kernel with drivers for SCSI (APEs) and serial boards (ACEs). The processing boards were interconnected by a redundant low latency parallel bus (ABUS) running at 20 MHz. The UNIX kernels running on the adjunct processors were modified to allow the fork/exec of processes across processing units. The system calls and peripheral drivers were also extended to allow processes to access remote resources across the ABUS. Since the ABUS was hot-swappable, processors could be added or replaced without shutting down the system. If one of the adjunct processors failed during operation, the system could detect and restart programs that had been running on the failed element.

The 3B4000 was capable of significant expansion; one test system (including storage) occupied 17 mid-height cabinets. Generally, the performance of the system increased linearly with additional processing elements, however the lack of a true shared memory capability required rewriting applications that relied heavily on this feature to avoid a severe performance penalty.

3B1 desktop workstation

Officially named the AT&T UNIX PC,[4] AT&T introduced a desktop computer in 1985 that was often dubbed the 3B1. However, this workstation was unrelated in hardware to the 3B line, and was based on the Motorola 68010 microprocessor. It ran a derivative of Unix System V Release 2 by Convergent Technologies. The system, which was also known as the PC-7300, was tailored for use as a productivity tool in office environments and as an electronic communication center.[4]

See also


  1. ^ J. O. Becker, The 3B20D PROCESSOR and DMERT Operating System (The Bell System Technical Journal, January 1983, Vol. 62, No. 1, Part 1), Page 193
  2. ^ 3B20S Processor System Index and Description, Western Electric Co., July 1981.
  3. ^ Olympics electronic messaging system demonstrated in IEEE Explore, November 1983, page 113.
  4. ^ a b AT&T, Select Code 999-601-311IS, AT&T UNIX PC Owner's Manual (1986)

External links

This page was last edited on 28 February 2021, at 18:01
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