1 μm process

Semiconductor device fabrication
MOSFET scaling (process nodes)
020 μm – 1968 010 μm – 1971 006 μm – 1974 003 μm – 1977  1.5 μm – 1981 001 μm – 1984 800 nm – 1987 600 nm – 1990 350 nm – 1993 250 nm – 1996 180 nm – 1999 130 nm – 2001 090 nm – 2003 065 nm – 2005 045 nm – 2007 032 nm – 2009 028 nm – 2010 022 nm – 2012 014 nm – 2014 010 nm – 2016 007 nm – 2018 005 nm – 2020 003 nm – 2022
Future 002 nm ~ 2024
Half-nodes Density CMOS Device (multi-gate) Moore's law Transistor count Semiconductor Industry Nanoelectronics
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The 1 μm process (1 micrometer process) is a level of MOSFET semiconductor process technology that was commercialized around the 1984–1986 timeframe,^[1][2] by companies like NTT, NEC, Intel and IBM. It was the first process where CMOS was common (as opposed to NMOS).

The 1 μm process refers to the minimum size that could be reliably produced. The smallest transistors and other circuit elements on a chip made with this process were around 1 micrometers wide.

The earliest MOSFET with a 1 μm NMOS channel length was fabricated by a research team led by Robert H. Dennard, Hwa-Nien Yu and F.H. Gaensslen at the IBM T.J. Watson Research Center in 1974.^[3]

Products featuring 1.0 μm manufacturing process

• NTT introduced the 1 μm process for its DRAM memory chips, including its 64k in 1979 and 256k in 1980.^[4]
• NEC's 1 Mbit DRAM memory chip was manufactured with the 1 μm process in 1984.^[5]
• Intel 80386 CPU launched in 1985 was manufactured using this process.^[1]
• Intel uses this process on the CHMOS III-E technology.^[6]
• Intel uses this process on the CHMOS IV technology.^[7]

References

External links

• Brief timeline of microprocessor development

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This page was last edited on 31 May 2024, at 16:51